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structural model for t flipflop using d flip flop.

  

structural model for t flipflop using d flip flop.

RTL

// d flip flop

 

module dflipflop(d,clk,reset,q,q_bar);

 

input d,clk,reset;

output reg q;

output q_bar;

 

always@(posedge clk)

begin

    if(reset)

        q<=0;

    else

        q<=d;

       

end

 

    assign q_bar=~q;

 

 

endmodule

 

//t flipflop

 

module tflipflop(t,clk,reset,q,q_bar);

 

input t,clk,reset;

inout q;

output q_bar;

wire w1;

 

 

dflipflop D(.d(w1),.clk(clk),.reset(reset),.q(q),.q_bar(q_bar));

xor X(w1,t,q);

 

 

 

endmodule

 

Test bench

//t flipflop tb

 

module tflipflop_tb();

 

reg t,clk,rst;

wire q,q_bar;

 

tflipflop T(t,clk,rst,q,q_bar);

 

initial

begin

clk=0;

    forever #5 clk=~clk;

end

 

initial

begin

rst=0;

#5 t=1;

#5 rst=1;

#5 t=0;

#5 t=1;

#5 t=1;

#5;

#5 rst=0;

#5 t=1;

#5 t=0;

#5 t=0;

#5 t=1;

 

end

 

initial

$monitor("Input rst=%b,clk=%b,t=%b Output q=%b,q_bar=%b",rst,clk,t,q,q_bar);

 

initial

#70 $finish;

 

endmodule

 

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