To understand, how to write RTL(behavioural)abstraction for Multiplexer.
RTL
//4:1 behaviour RTL
module mux4_1(d,s,y);
input [3:0]d;
input [1:0]s;
output reg y;
always@(s,d)
begin
case(s)
2'b00 : y=d[0];
2'b01 : y=d[1];
2'b10 : y=d[2];
2'b11 : y=d[3];
default : y=0;
endcase
end
endmodule
Test Bench
//4:1 mux testbench
module mux4_1_tb();
reg [3:0]d;
reg [1:0]s;
wire y;
integer m,n;
mux4_1 M(d,s,y);
task inistial();
begin
{d,s}=0;
end
endtask
task data([3:0]a,[1:0]b);
begin
d=a;
s=b;
end
endtask
initial
begin
for(m=0;m<16;m=m+1)
begin
for(n=0;n<4;n=n+1)
begin
data(m,n);
#5;
end
#5;
end
end
initial
$monitor("Inputs d=%b,s=%s, Output y=%b",d,s,y);
initial
#100 $finish;
endmodule
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